The invention relates to a circuit configuration with a load transistor for switching a load and with a current measuring configuration for sensing a load current through the load transistor.
FIG. 1 shows such a circuit configuration with a load transistor T10 which is embodied as a MOS (Metal Oxide Semiconductor) transistor, and a current measuring configuration 100 which is connected to the load transistor T10 and operates according to what is referred to as the xe2x80x9ccurrent-sense principle.xe2x80x9d The drain terminal of the load transistor T10 is connected to a first supply potential V10 and its source terminal S is connected via a load to a second supply potential GND. The load transistor T10 functions as a switch for driving the load, the transistor T10 in the example is conducting if a potential, which is higher than the potential at its source terminal S by a value of a threshold voltage, is applied to its gate terminal G. A load current I10 then flows through the transistor T10 and the load. In the current measuring configuration operating according to the current-sense principle there is a measuring transistor T20 which is operated at the same operating point as the load transistor T10. The drain terminal D of the measuring transistor T20 is connected for this purpose to the drain terminal D of the load transistor T10, and the gate terminal G of the measuring transistor T20 is connected to the gate terminal of the load transistor T10. In order to set the operating point of the measuring transistor T20 there is a control amplifier or operational amplifier OPV, one of whose inputs is connected to the source terminal S of the first transistor T10, and the other terminal of which is connected to the source terminal S of the second transistor T20. An output of the control amplifier OPV controls a transistor T30 which is connected downstream of the measuring transistor T20 in such a way that the potentials at the source terminals S of the load transistor T10 and of the measuring transistor T20 correspond. The load transistor T10 and the measuring transistor T10 are usually implemented in a common semiconductor element or chip through the use of the same manufacturing process, the transistor area of the load transistor T10 being considerably greater than that of the measuring transistor T20. The current I20 through the measuring transistor T20, which is operated at the same operating point as the load transistor T10, is proportional to the load current I10, the proportionality factor corresponding to the ratio of the transistor areas. A voltage U30, which is proportional to the load current I10, can then be tapped off with respect to the second supply potential GND at a resistor R30 which is connected downstream of the transistor T30 and one of whose terminals is connected to the transistor T30 and the other of whose terminals is connected to the second supply potential.
A disadvantage with the circuit configuration illustrated in FIG. 1 with a load transistor T10 and a current measuring configuration 100 is that the current measuring configuration 100 supplies a measuring current I20 which is proportional to the load current I10 only if the load transistor T10 is in the normal operating mode. An n-type channel transistor is in the normal operating mode if its drain potential is greater than its source potential, and a p-type channel transistor is in the normal operating mode if its drain potential is smaller than its source potential. The measuring configuration does not function in what is referred to as xe2x80x9cinverse operationxe2x80x9d of the load transistor T10 when the source potential in n-type channel transistors is greater than the drain potential, and the current I10 flows counter to the direction shown in FIG. 1. In order to bring about a corresponding measuring current through the measuring transistor T10 counter to the direction shown in FIG. 1, a potential which is greater than the first supply potential V10, in accordance with the potential at the source terminal of the load transistor T10, would have to be available at the source terminal S of the measuring transistor T20 given a sufficient current yield. The provision of such a potential given sufficient current yield to provide a measuring current in the source-drain direction of the measuring transistor T20 is not possible on-chip, that is to say in the same semiconductor element in which the load transistor T10 and the current measuring configuration 100 are implemented, or is only possible with considerable additional expenditure.
It is accordingly an object of the invention to provide a circuit configuration with a load transistor and a current measuring configuration which overcomes the above-mentioned disadvantages of the heretofore-known circuit configurations of this general type and which permits current to be measured during the inverse operation of the load transistor.
With the foregoing and other objects in view there is provided, in accordance with the invention, a circuit configuration, including:
a load transistor having a control terminal, a first load path terminal to be connected to a first supply potential, and a second load path terminal to be connected a load, the load transistor having a load current flowing between the first load path terminal and the second load path terminal; and
a current measuring configuration connected to the load transistor, the current measuring configuration having an output for providing a measuring current between the output of the current measuring configuration and a second supply potential, the current measuring configuration providing the measuring current such that the measuring current and the load current have respectively opposite signs and such that the measuring current and the load current have respective absolute values at least substantially proportional to one another.
In other words, the circuit configuration according to the invention has a load transistor with a control terminal, a first load path terminal which is connected to a terminal for a first supply potential, and a second load path terminal for connecting to a load. A current measuring configuration is connected to the first transistor, the current measuring configuration has an output at which a measuring current to a second supply potential is available, the measuring current has a sign opposite to that of a load current between the first and second load path terminals of the load transistor and the absolute value of the measuring current is at least approximately proportional to the absolute value of the load current.
According to one embodiment of the invention, the current measuring configuration has a measuring transistor with a control terminal, a first load path terminal and a second load path terminal. The current measuring configuration also has a control circuit with a controllable resistor which is connected to the second load path terminal of the measuring transistor, and a drive circuit for driving the resistor, the drive circuit driving, according to one embodiment, the controllable resistor as a function of a first load path voltage between the first and second load path terminals of the load transistor, and as a function of a second load path voltage between the first and second load path terminals of the measuring transistor, in such a way that the absolute value of the second load path voltage corresponds to the absolute value of the first load path voltage, and the second load path voltage has a sign which is reversed in comparison with the first load path voltage.
According to a further embodiment of the circuit configuration according to the invention, there is provision for the drive circuit to set the absolute value of the second load path voltage to be smaller than the absolute value of the first load path voltage.
The drive circuit preferably adjusts the voltage between the control terminal and the second load path terminal of the measuring transistor in such a way that it corresponds to the voltage between the control terminal and the first load path terminal of the load transistor. The measuring transistor which is of the same conduction type as the load transistor is then operated at an xe2x80x9cinverse operating pointxe2x80x9d with respect to the operating point of the load transistor.
If the load transistor and the measuring transistor are preferably MOS transistors in which the drain terminal corresponds to the first load path terminal, the source terminal corresponds to the second load path terminal and the gate terminal corresponds to the control terminal.
The load transistor is in the inverse operating mode which is distinguished in the case of n-type channel MOS transistors by a negative drain-source voltage, and in the case of p-type channel transistors by a positive drain-source voltage, the measuring transistor, which is of the same conduction type as the load transistor, is in the normal operating mode, which is distinguished in the case of n-type channel MOS transistors by a positive drain-source voltage and in the case of p-type channel transistors by a negative drain-source voltage.
According to one embodiment of the invention, a control circuit is connected between the control terminal of the load transistor and the control terminal of the measuring transistor in order to adjust the voltage between the control terminal and the second load path terminal of the measuring transistor, the control circuit being additionally connected to the first load path terminal of the load transistor and to the second load path terminal of the measuring transistor. The conduction behavior of the load transistor is determined in the inverse operating mode by the voltage between its control terminal and its first load path terminal, that is to say the gate-drain voltage in the case of MOS transistors, while the conduction behavior of the measuring transistor is determined by the voltage between its control terminal and its second load path terminal, that is to say the gate-source voltage in the case of MOS transistors. The control circuit is embodied in such a way that the voltage between the control terminal and the first load path terminal of the first transistor corresponds to the voltage between the control terminal and the second load path terminal of the measuring transistor. The load transistor and the measuring transistor are thus operated at operating points which are xe2x80x9cinvertedxe2x80x9d with respect to one another and which are distinguished by an opposed current flow in the transistors. If a negative drain-source current flows through the load transistor when an n-type channel MOS transistor is used in the inverse operating mode, the drain-source current of the measuring transistor is positive.
In the circuit configuration according to the invention, in the inverse operating mode of the load transistor a measuring current which is positive with respect to the second supply potential and whose absolute value is proportional to the load current is available if, in the case of an n-type channel transistor, a potential which is greater than its drain potential is applied to the source terminal of the n-type channel transistor by a connected load.
According to another feature of the invention, the current measuring configuration has a first connecting terminal connected to the first load path terminal of the load transistor, a second connecting terminal connected to the second load path terminal of the load transistor, and a third connecting terminal connected to the control terminal of the load transistor.
According to yet another feature of the invention, the current measuring configuration includes a measuring transistor having a control terminal, a first load path terminal and a second load path terminal; a controllable resistor having a control terminal and a load path, the load path being connected to the second load path terminal of the measuring transistor; and a drive circuit having an output terminal connected to the control terminal of the controllable resistor, the drive circuit being connected to the control terminal of the load transistor, to the first load path terminal of the load transistor, to the second load path terminal of the load transistor, to the control terminal of the measuring transistor, to the first load path terminal of the measuring transistor and to the second load path terminal of the measuring transistor.
According to a further feature of the invention, the drive circuit drives the controllable resistor in dependence of a first load path voltage between the first and second load path terminals of the load transistor, and in dependence of a second load path voltage between the first and second load path terminals of the measuring transistor.
According to another feature of the invention, the drive circuit drives the controllable resistor such that the second load path voltage and the first load path voltage have substantially identical absolute values and such that the second load path voltage and the first load path voltage have respectively opposite signs.
According to yet another feature of the invention, the drive circuit drives the controllable resistor such that an absolute value of the second load path voltage is smaller than an absolute value of the first load path voltage, and such that the second load path voltage and the first load path voltage have respectively opposite signs.
According to a further feature of the invention, the drive circuit includes a series circuit including a first resistor, a second resistor and a tap node; and the drive circuit further includes a control amplifier having a first input, a second input, and an output, the tap node of the series circuit being connected to the first input of the control amplifier, the first load path terminals of the load transistor and of the measuring transistor being connected to the second input of the control amplifier, and the control terminal of the controllable resistor being connected to the output of the control amplifier.
According to another feature of the invention, the controllable resistor is a transistor.
According to yet another feature of the invention, the first resistor and the second resistors have substantially identical resistance values.
According to another feature of the invention, the first resistor has a first resistance, the second resistor has a second resistance, and the first resistance is greater than the second resistance.
According to yet another feature of the invention, the control terminal of the load transistor is connected to the control terminal of the measuring transistor.
According to a further feature of the invention, a control configuration is connected between the control terminal of the load transistor and the control terminal of the measuring transistor.
According to yet a further feature of the invention, the control configuration sets a first voltage between the control terminal of the measuring transistor and the second load path terminal of the measuring transistor such that the first voltage has an absolute value substantially identical to an absolute value of a second voltage present between the control terminal of the load transistor and the first load path terminal of the load transistor.
According to another feature of the invention, the control configuration sets a first voltage between the control terminal of the measuring transistor and the second load path terminal of the measuring transistor such that an absolute value of the first voltage is smaller than an absolute value of a second voltage present between the control terminal of the load transistor and the first load path terminal of the load transistor.
According to yet another feature of the invention, the control configuration includes a third resistor connected between the control terminal of the load transistor and the control terminal of the measuring transistor; a series circuit including a fourth resistor and a controllable resistor, the series circuit being connected between the control terminal of the measuring transistor and the second load path terminal of the measuring transistor, the fourth resistor and the controllable resistor having a common node; and a control amplifier having a first input connected to the first load path terminal of the load transistor and to the first load path terminal of the measuring transistor, a second input connected to the common node, and an output connected to the control terminal of the controllable resistor.
According to a further feature of the invention, the third resistor and the fourth resistor have substantially identical resistance values.
According to another feature of the invention, the third resistor has a third resistance, the fourth resistor has a fourth resistance, and the fourth resistance is smaller than the third resistance.
According to yet another feature of the invention, the controllable resistor is a transistor.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a circuit configuration with a load transistor and a current measuring configuration, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.